A company is looking for a Lead ASIC/FPGA Design Engineer.Key Responsibilities:Deliver an end-to-end ASIC/FPGA modem solutionLead the micro-architecture and RTL development for key DSP blocks in the coherent modemCollaborate with system architects and DSP algorithm developers to translate DSP specifications into robust RTL designsRequired Qualifications:Active Security Clearance, or eligibility to obtain oneBachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field5+ years of hands-on experience in RTL design for high-speed digital communicationsProficiency in logic design concepts and RTL coding using Verilog/System VerilogDemonstrated ability to ensure RTL designs meet industry or company standards